Experimental procedure for the evaluation of GaAs-based HBT's reliability

This work describes the implementation of an experimental procedure to eval uate the reliability of Heterojunction Bipolar Transistors (HBT) on a GaAs substrate. It is based on the separation of aging test accelerating factors applied on two test vehicles: HBT and Transmission Line Model (TLM) struct ures associated with emitter, base and collector layers. To identify the ph ysical origin of the degradation mechanism, analysis techniques are used: E DX, SEM and TEM observations for which a new sample preparation method has been worked out. Three different technological fabrication processes, are i nvestigated: AlGaAs/GaAs double-mesa HBT, GaInP/GaAs self-aligned HBT and G aInP/GaAs fully planar HBT. These investigations have revealed two major fa ilure mechanisms: the degradation of SiN-GaAs interface correlated with the increase of emitter-to-base leakage current of HBT submitted to combined b ias and temperature stresses; the detachment of Ge/Mo/W emitter ohmic conta ct related to the base and collector current decrease for high level inject ion in forward regime. A 2D simulation has lead to modify the interface electrical properties to e valuate the impact of the two degradations on HBT de characteristics. (C) 2 001 Elsevier Science Ltd. All rights reserved.