Material and process limits in silicon VLSI technology

Citation
Jd. Plummer et Pb. Griffin, Material and process limits in silicon VLSI technology, P IEEE, 89(3), 2001, pp. 240-258
Citations number
56
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
PROCEEDINGS OF THE IEEE
ISSN journal
00189219 → ACNP
Volume
89
Issue
3
Year of publication
2001
Pages
240 - 258
Database
ISI
SICI code
0018-9219(200103)89:3<240:MAPLIS>2.0.ZU;2-Q
Abstract
The integrated circuit (IC) industry has followed a steady path of shrinkin g device geometries for more than 30 years. It is widely believed that this process will continue for at least another ten years. However there are in creasingly difficult materials and technology problems to be solved over th e next decade if this is to actually occur and, beyond ten years. there is great uncertainly. about the ability to continue scaling metal-oxide-semico nductor field-effect transistor (MOSFET) structures. This paper describes s ome of the most challenging materials and process issues to be faced in the future and, where possible solutions are known, describes these potential solutions. The paper is written with the underlying assumption that the bas ic metal-oxide-semiconductor (MOS) transistor will remain the dominant swit ching: device used in ICs and it further assumes that silicon will remain t he dominant substrate material.