Design considerations for high data-rate pre-amplifiers for use in a disk-drive

In an effort to achieve higher data-rates in disk-drives, it has been propo sed that moving the preamp closer to the head will improve writer performan ce, This paper will show that the opposite is true: moving the writer close r to the head degrades write current rise-time and overshoot, Although sett ling time is improved by moving the preamp closer to the head, impedance-ma tching techniques are sufficient to address this. Ironically, reader consid erations may motivate Chip-On-Suspension (COS), but only for MR sensors tha t are either very high or very low impedance. This paper will detail the no ise peaking that results from an impedance-mismatched reader input network. Both reader and writer performances can be improved by using novel archite ctures and by optimizing their respective interconnects.