Barrier layers for Cu ULSI metallization

Barrier layers are integral parts of many metal interconnect systems. In th is paper we review the current status of barrier layers for copper metalliz ation for ultra-large-scale-integration (ULSI) technology for integrated ci rcuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickn ess and the deposition processes, for their manufacturing are discussed. Va rious deposition methods are presented: physical vapor deposition (PVD), ch emical vapor deposition (CVD), electrochemical deposition (ECD), electroles s deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers impleme ntation. The barrier integration methods and the interaction between the ba rrier and the copper metallization are presented and discussed. Finally, th e common inspection and metrology for barrier layer are critically reviewed .