Material issues in electronic interconnects and packaging

Citation
Kn. Subramanian et al., Material issues in electronic interconnects and packaging, J ELEC MAT, 30(4), 2001, pp. 372-378
Citations number
22
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
JOURNAL OF ELECTRONIC MATERIALS
ISSN journal
03615235 → ACNP
Volume
30
Issue
4
Year of publication
2001
Pages
372 - 378
Database
ISI
SICI code
0361-5235(200104)30:4<372:MIIEIA>2.0.ZU;2-Z
Abstract
Electronic packages consist of metallic, polymeric, and sometimes ceramic m aterials as integral entities. Individual physical and mechanical propertie s of these constituents, and their influence on each other's behavior, affe ct the overall reliability of the electronic packages. The most common fail ures in electronic interconnects arise from thermomechanical fatigue of the solder joints. Mismatches in coefficient of thermal expansion (CTE) that e xist between these constituent materials are the main cause of such failure s. Several approaches such as alloying and composite methodology are being explored to improve the reliability of the solder, which is metallic in nat ure, by improving its mechanical attributes. Other avenues such as matching the CTE of the constituent materials are also being considered. In additio n, the metallization of the electrical components and electrically non-cond ucting polymeric/ceramic layer to make it solderable has also been a source of concern regarding the joint reliability. Another concern relates to the high CTE of polymeric boards. This can cause significant CTE mismatch prob lems if silicon chips are directly mounted on them. Some of our significant findings in these respects are presented.