SFQ standard cell-based circuit design of an internal link speeded-up Batcher-Banyan packet switch

We are developing a single-flux-quantum (SFQ) packet switch for over 1-Tb/s switching systems. Investigation of several switch topologies leads us to select the Batcher-Banyan packet switch because of its simplicity and regul arity. The packet switch structure we propose consists of simple 2x2 unit s witches each connected by speeded-up internal Links. Numeric simulation sho wed that the speeded-up links greatly improved the throughput by resolving packet blocking, which is a major drawback of the Banyan switch. High throu ghput compatible to a crossbar switch was attained by using links whose spe ed was quadrupled. Moreover, the throughput did not decrease even though th e number of input/output ports increased. Taking the speed of SFQ basic gat es into account, the cycle time of the 2x2 unit switch reaches 25 ps, which is sufficient to achieve the 40-GHz operation. If unit switches are connec ted by quadrupled internal links, the Batcher-Banyan switch can accept the 10-Gb/s external input rate per channel. This indicates that the total thro ughput of a 128x128 switch exceeds 1 Tb/s. The unit switch was designed dow n to the SFQ gate level. To design a large SFQ circuit, we built several "s tandard" SFQ cells whose shape was square or rectangular with a unit width and height. Such shapes make it easier to place and connect a number of cel ls. We show some experimental results of testing SFQ standard cells and log ic circuits.