Study on fabrication conditions of the interface-treated trilayer junctions

We have investigated the effects of fabrication conditions on the propertie s of the interface-treated trilayer Josephson junctions. In the junctions, barriers are formed by ion milling, followed by annealing. We controlled th e accelerating voltage for the milling process and the gas pressure for the annealing process, Josephson currents were observed in the junctions fabri cated under various conditions. It was found that higher accelerating volta ge contributes to the reduction of leakage paths in the barriers. However, clear dependence of the Josephson currents on the conditions was not observ ed in contrast to the results for the ramp-edge junctions.