A latching-type driver circuit using capacitively-shunted HTS ramp-edge-type junctions

Citation
T. Hato et al., A latching-type driver circuit using capacitively-shunted HTS ramp-edge-type junctions, IEEE APPL S, 11(1), 2001, pp. 936-939
Citations number
10
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
ISSN journal
10518223 → ACNP
Volume
11
Issue
1
Year of publication
2001
Part
1
Pages
936 - 939
Database
ISI
SICI code
1051-8223(200103)11:1<936:ALDCUC>2.0.ZU;2-C
Abstract
We developed a latching-type driver using capacitively shunted high-tempera ture superconductivity (HTS) junctions for Single-Flux-Quantum (SFQ)-semico nductor output interfaces and fabricated it using ramp-edge-type HTS juncti ons. Assuming a junction IcRn product of 2 mV, a circuit simulation shows t hat the driver can produce an output of about 8 mV from an SFQ input pulse with a sufficiently short rise time for an interface clock operation of sev eral gigahertz HTS junctions were fabricated using the interface engineerin g method, and capacitors were made from an Indium oxide insulator (the diel ectric constant was a bout 23 at 20 K) sandwiched by krBa(2)Cu(3)O(7-X) (YB CO) electrodes. The hysteresis of the I-V characteristics of the junctions increased by increasing the area of capacitance. The latching operation of the driver was observed with an output voltage of up to 3 mV.