The Hybrid Technology Multi-Threaded (HTMT) approach to petaflops computing
includes large numbers of ultra-high performance Nb Rapid Single Flux Quan
tum IRSFQ) processor and memory chips, making it by far the largest active
superconducting electronics project in the United States. In order to achie
ve petaflops, RSFQ circuits with 10(5) to 10(6) junctions per chip will be
required to operate at clock speeds of 50 to 100 GHz, far beyond the curren
t state of the art. In this paper, we review the state of the art of Nh cir
cuit fabrication and discuss the requirements for significantly improving c
ircuit density and speed.