SINIS process development for integrated circuits with characteristic voltages exceeding 250 mu V

At PTB, the fabrication process in Nb-Al/AlxOy/Al/AlxOy/Al-Nb SINIS multila yer technology has been improved to raise the characteristic voltage of SIN IS two-tunnel Josephson junctions up to V-C = ICRn = 245 muV. The process h as been realized in LTS implementation. Various sets of the test wafers and wafers containing dc/SFQ and SFQ/dc converters, Josephson transmission lin es, and T-flipflop circuits were fabricated and measured. The critical curr ent densities of the junctions have been varied in the range from 70 A/cm(2 ) to 2.2 kA/cm(2) with corresponding characteristic voltages of V-C = 55 mu V and 245 muV at the temperature of 4.2 K, The junctions show nearly hyster esis-free behaviour (less than 15%), the intra-wafer parameter spread is sm aller than +/- 10%, RSFQ circuits have been realized with operation margins of the bias currents larger than +/- 20%.