Two-step quantization in multibit Delta Sigma modulators

An architecture to simplify the circuit implementation of the internal anal og-to-digital (A/D) converter in a Delta Sigma modulator is proposed. The a rchitecture is based on dividing the A/D conversion into tyro time steps, w hich makes the internal quantization feasible with much higher resolution t han with conventional solutions. Furthermore, the time steps are interleave d so that the resolution improvement is achieved without sacrificing the sp eed. It is shown, with a linearized model, that the order of the noise shap ing is increased by one with respect to the coarse quantization error made during the first step. For a high oversampling ratio, the coarse quantization error made in the fi rst step is easily suppressed to an insignificant level due to the one orde r higher noise shaping. Depending on the partitioning of the bits between t he conversion steps, the coarse error will dominate below a certain oversam ping ratio. However, it is shown that the technique can be extended to more than one order higher noise shaping, making it useful for low oversampling ratios as well.