POSE: A parallel object-oriented synthesis environment

Authors
Citation
Pa. Hsiung, POSE: A parallel object-oriented synthesis environment, ACM T DES A, 6(1), 2001, pp. 67-92
Citations number
23
Categorie Soggetti
Computer Science & Engineering
Journal title
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
ISSN journal
10844309 → ACNP
Volume
6
Issue
1
Year of publication
2001
Pages
67 - 92
Database
ISI
SICI code
1084-4309(200101)6:1<67:PAPOSE>2.0.ZU;2-#
Abstract
Design automation tools and methodologies always encounter a problem of how systems may be designed efficiently, including issues such as static model ing and dynamic manipulation of system parts. With the rapid progress of de sign technology, the continuously increasing number of different choices pe r system part and the growing complexity of today's systems, the efficiency of the design environment is not only a major concern now, but will also b e a demanding problem in the near future. In contrast to heuristic methods, a novel environment called POSE is proposed that increases efficiency duri ng design without losing optimality in the final design results. System par ts are modeled using the popular object-oriented modeling technique and are dynamically manipulated using the parallel design technique. A complete in tegration of object-oriented and parallel techniques is one of the major fe atures of POSE. Common problems related to parallel design such as emptines s and deadlock are also elegantly solved within POSE. Experimental results and formal analysis based on POSE all show its practical and theoretical us efulness. POSE can be used at any level of synthesis as long as off-the-she lf building-blocks manipulation is required. POSE can be applied especially to system-level synthesis, whose targets can be parallel computer architec tures, systems-on-chip, or embedded systems. We will show how POSE has been applied to ICOS, a recently proposed synthesis methodology. Furthermore, P OSE can be easily integrated with other heuristic design methodologies to a llow increased design efficiency.