A high-speed twin-capacitor BiNMOS (TC-BiNMOS) logic circuit for single battery operation

This paper presents a novel BiNMOS logic gate specially designed for single battery operation (1.2-1.5 V), Through the use of two capacitors, in the p re-charging and bootstrapping cycles, the circuit achieves a high-speed and full-swing operation. Analytical expressions for the circuit were derived, and the main design considerations were addressed, Based on a 0.5 mum BiCM OS technology, HSPICE simulation results have proven the superiority of the new circuit over the CMOS, BFBiNMOS and BSBiNMOS circuits in terms of spee d and power consumption. The circuit also occupies the smallest area amongs t the BiNMOS families. A 75-stage ring oscillator of the new circuit was fa bricated using a 0.8 mum BiCMOS process, and the measured gate delay/stage is merely 1.32 ns at a supply voltage of 1.5 V and a load capacitance of 1 pF.