A FPGA-based library for on-line signal processing

A library of on-line arithmetic structures is presented. Their ability to p roduce and consume the most significant digit first allows subsequent compu tations to begin earlier, shortens the execution time of variable precision and composite operations, and simplifies interconnection networks which ca n help preserve high clock rates in large digit-serial designs. More import antly, designers can interconnect individual units without designing interm ediate structures to reformat data, a luxury that is currently unavailable to FPGA designers wishing to use bit-serial arithmetic. The on-line structu res introduced are small, and can be easily combined to yield more powerful blocks. The library's applicability to signal processing applications is d emonstrated with the DFT, DCT and FIR filter. Results indicate high area ef ficiency and rapid execution speed.