Tj. Goh et al., Cartridge thermal design of Pentium (R) !!! processor for workstation: Giga hertz technology envelope extension challenges, PROCEEDINGS OF 3RD ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, 2000, pp. 65-71
This paper highlights the associated thermal challenges of Pentium (R) !!!
Xeon (TM) processor, materials, and methods used in thermal management. Car
tridge technology development activities to address these thermal issues in
a systematic manner and to certify new cartridge technology to intercept t
he lead product of 733 MHz as well as its technology extension up to 1 GHz
will be discussed. This paper will be divided into three major sections. Fi
rst section is to describe the thermal impedance theory, the metrology of t
he junction to plate thermal impedance R-jp and thermal requirements/target
s of cartridge processor thermal design. Thermal modeling using finite elem
ent method has been employed to investigate the changes of the non-uniform
power junction to plate thermal relation resistance, Psi (jp) in response t
o the uniform power R-jp as well as both core and on-die integrated cache p
ower level variations. Thermal test vehicle design to support the DOE activ
ities will also be illustrated this section. The second section of this pap
er describes the material characterization and validations which were carri
ed out using the thermal metrology proposed in the first section to develop
suitable thermal interface material (TIM) candidate for cartridge packagin
g. Detailed descriptions of material development and certification activiti
es of phase change TIM to meet 733 MHz Pentium (R) !!! Xeon (TM) processor
product's thermal requirements will be provided, in the last section, therm
al optimization studies driven by technology roadmap extensions (i.e. 800 M
Hz and 1 GHz) will be discussed. For 800 MHz product extension, TIM optimiz
ation to further improve the thermal performance of the existing phase chan
ge TIM was performed. This was achieved by reducing the bond-line-thickness
(BLT) of the TIM through mechanical design and cartridge system electrical
test process optimizations. Statistical optimization approaches and their
implications on the cartridge thermal design under use conditions will also
be discussed.