A CMOS monolithic image-reject filter

A CMOS inductorless image-reject filter based on active RLC circuitry is di scussed and designed with the emphasis on low-noise, low-power, and gigaher tz-range circuits. Two Q-enhancement techniques are utilized to circumvent the low Q characteristics inherent in the simple feedback circuit. The freq uency tuning is almost independent of Q tuning, facilitating the design of the automatic tuning circuitry. The stability and the tuning scheme of the filter are also discussed. Simulations using 0.6 mum CMOS technology demons trate the feasibility of the tunable image-reject filter for GSM wireless a pplications. Simulation results show 4.75 dB voltage gain, 9.5 dB noise fig ure, and -20 dBm IIP3 at a passband centered at 947 MHz. The image signal s uppression is 60 dB at 1089 MHz and the power consumption is 27 mW.