An interconnect-centric design flow for nanometer technologies

As the integrated circuits (ICs) are scaled into nanometer dimensions and o perate in gigahertz frequencies, interconnects have become critical in dete rmining system performance and reliability. This paper presents the ongoing research effort at UCLA in developing an interconnect-centric design flow, including interconnect planning, interconnect synthesis, and interconnect layout, which allows interconnect design and optimization to be properly co nsidered at every level of the design process. Efficient interconnect perfo rmance estimation models and tools at various levels are also developed to support such an interconnect-centric design flow.