Toward accurate models of achievable routing

Models of achievable routing, i,e,, chip wireability, rely on estimates of available and required routing resources. Required routing resources are es timated from placement or (apriori) using wire length estimation models. Av ailable routing resources are estimated by calculating a nominal "supply" t hen take into account such factors as the efficiency of the router and the impact of vias. Models of achievable routing can be used to optimize interc onnect process parameters for future designs or to supply objectives that g uide layout tools to promising solutions. Such models must be accurate in o rder to be useful and must support empirical verification and calibration b y actual routing results. Pn this paper, we discuss the validation of such models and me apply our validation process to three existing models. We fin d notable inaccuracies in the existing models when matched against real dat a. We then present a thorough analysis of the assumptions underlying these models. Based on this analysis, we discuss requirements for predictors of r outing resources and make suggestions for a new model of achievable routing .