A formal approach to context scheduling for multicontext reconfigurable architectures

Citation
R. Maestre et al., A formal approach to context scheduling for multicontext reconfigurable architectures, IEEE VLSI, 9(1), 2001, pp. 173-185
Citations number
25
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN journal
10638210 → ACNP
Volume
9
Issue
1
Year of publication
2001
Pages
173 - 185
Database
ISI
SICI code
1063-8210(200102)9:1<173:AFATCS>2.0.ZU;2-W
Abstract
In this paper, we analyze the main issues in context scheduling for multico ntext reconfigurable architectures from a formal point of view. We first pr ovide an intuitive approach, which is later supported by a detailed analysi s of the mathematical relations that express the reconfiguration process. T his enables us to deduce a methodology for the minimization of context load ing overhead, which considers the tradeoff between achievable system perfor mance and algorithm efficiency. In this respect, the optimality necessary c onditions are established in order to contrive an optimal search. However, as this approach is very time consuming we propose some heuristic technique s that reduce the algorithm complexity and accomplish very good results in relatively short execution time. This work has been developed as a part of an automated design environment for reconfigurable systems, A set of experi ments has been developed so as to validate the theoretical results.