In this paper, we propose two architectures for the direct two-dimensional
(2-D) discrete wavelet transform (DWT), The first one is based on a modifie
d recursive pyramid algorithm (MRPA) and performs a "nonstandard" decomposi
tion (i.e., Mallet's tree) of an N x N image in approximately 2Na(2)/3 cloc
k cycles (ccs), This result consistently speeds up other known architecture
s that commonly need approximately Na ccs, Furthermore, the proposed archit
ecture is simpler than others in terms of hardware complexity.
Subsequently, we show how "symmetric"/"anti-symmetric" properties of linear
-phase wavelet filter bases can be exploited in order to further reduce the
VLSI area. This is used to design a second architecture that provides one
processing unit for each level of decomposition (pipelined approach) and pe
rforms a decomposition in approximately N-2/2 ccs, In many practical cases,
even this architecture is simpler than general MRPA-based devices (having
only one processing unit).