Cost reduction strategies for wafer expenditure

The productivity enhancement in microelectronics requires - among other mea sures - an increase in wafer diameter, such as the current transition from 200 to 300 mm. This transition of wafer diameter implicates an increase of fab costs, especially equipment costs, as well as an increase of costs for silicon material. Two approaches are suited to reduce the total wafer costs : the integration of metrology into processing tools and the abundant use o f reclaim wafers. With both methods, a wafer cost reduction can be achieved by reducing the amount of monitor and test wafers and by re-usage of mispr ocessed product wafers. The examples for Integrated Metrology given in the paper are ellipsometer integration into a cluster tool, integrated scattero metry for fast fault detection, and in situ particle measurement. The possi ble savings in test and monitor wafers, which can be achieved by integratio n of metrology, strongly depend on process technology, process flow, the pr ocess itself, and equipment. For mass products like memories, the amount of monitor and test wafers could be reduced by half and for ASICS even more. This means a total reduction in wafer expenditure of 7-15% for ASIC product ion, and even 15-25% may be reached for mass production. Savings in this or der require a fab-wide integration of metrology. A prerequisite is the deve lopment of standardized approaches for the integration of metrology compreh ending standardized hardware and software interfaces. Integrated metrology can reduce the amount of material transport and wafer handling and also imp rove the equipment utilization and maintenance. The control paradigm can th us be shifted from a lot-to-lot basis to a wafer-to-wafer basis for the 300 mm technology. For wafer reclaim it could be shown that the reclaiming of non-productive wafers allows an increase in the profitability of an advance d wafer fab. In contrast to conventional wafer reclaim, different quality l evels optimized for the accordingly different applications in a wafer fab w ere defined. Quality control of reclaimed wafers is of utmost importance wi thin each specified level. The efficiency of the reclaim service can be sig nificantly increased by an application-specific wafer reclaim model consist ing of different quality levels. However, optimized strategies further requ ire closer linking of IC production and wafer reclaim with optimized logist ics. (C) 2001 Elsevier Science B.V. All rights reserved.