Recent advances in latency hiding techniques have made performance evaluati
on of memory hierarchies a more difficult task. Applications compiled for a
particular architecture may be executed on vastly different memory hierarc
hy implementations. There is a need for performance analysis techniques tha
t provide methods for understanding the interaction between applications an
d a given memory hierarchy. In this paper, we present a statistical approac
h to performance analysis of advanced memory hierarchy implementations. The
method involves the utilization of previously available statistical analys
is techniques coupled with scalability analysis. The result is a novel step
-wise approach to understanding the hierarchical memory performance of scie
ntific applications. We apply the method to several scientific applications
of interest to the accelerated strategic computing initiative (ASCI) over
the SGI machines PowerChallenge and Origin 2000. Results indicate some code
s are statistically identical in memory performance, while others vary grea
tly. Furthermore, some codes do not take advantage of the performance enhan
cements to the memory system found in the Origin 2000. (C) 2001 Elsevier Sc
ience B.V. All rights reserved.