Development of template matching hardware and its high-speed processing strategy

Citation
S. Muramatsu et al., Development of template matching hardware and its high-speed processing strategy, ELEC C JP 3, 84(11), 2001, pp. 1-10
Citations number
14
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS AND COMMUNICATIONS IN JAPAN PART III-FUNDAMENTAL ELECTRONIC SCIENCE
ISSN journal
10420967 → ACNP
Volume
84
Issue
11
Year of publication
2001
Pages
1 - 10
Database
ISI
SICI code
1042-0967(2001)84:11<1:DOTMHA>2.0.ZU;2-V
Abstract
The template matching technique is now applied to tracking of outdoor objec t and position measurement, and there is increasing demand for application of template matching based on the normalized correlation coefficient, which is robust against the variation of illumination. In order to apply the tec hnique based on the normalization technique to practical application proble ms, however, highspeed calculation of the normalized correlation coefficien t is required. This paper intends to improve the speed by implementing by h ardware the calculation of the normalized correlation coefficient, which re quires a large amount of computation. The proposed method decomposes the no rmalized correlation coefficient calculation into five operational componen ts, each of which is implementated by hardware. The speed of processing is improved being combined with a parallel processing with a high degree of fr eedom based on the local property owned by the template matching process. F or further improvement of the speed, the application of the pyramid structu re is considered. Hardware that can handle the pyramid structure is realize d. An evaluation was tried using an actual machine. The performance of the developed hardware is evaluated. The effectiveness of the approach is verif ied by applying the method to the traffic flow measurement system, as an ex ample of an actual outdoor system. (C) 2001 Scripta Technica.