SOI and bulk CMOS frequency dividers operating above 15 GHz

Authors
Floyd, BA Shi, L Taur, Y Lagnado, I O, KK
Citation
Ba. Floyd et al., SOI and bulk CMOS frequency dividers operating above 15 GHz, ELECTR LETT, 37(10), 2001, pp. 617-618
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
37
Issue
10
Year of publication
2001
Pages
617 - 618
Database
ISI
SICI code
0013-5194(20010510)37:10<617:SABCFD>2.0.ZU;2-Z
Abstract
Dual-phase dynamic pseudo-NMOS ([DP](2)) frequency dividers have been imple mented in a partially scaled 0.1 mum CMOS technology. For 4:1 dividers on s ilicon-on-insulator (SOI) and bulk substrates, the maximum speed, power con sumption, and extracted [DP](2) latch delays are 18.75 and 15.4GHz, 13.5 an d 9.8mW and 13.3 and 16.2ps, respectively, at 1.5V.