A flash memory technology with quasi-virtual ground array for low-cost embedded applications

In this paper, the 0.35-mum implementation of a 1-Mb embedded flash memory circuit, based on a split-gate concept as described in [1], is presented. T his concept provides an excellent solution for embedded applications, thank s to the very limited number of processing steps that are needed on top of a baseline CMOS process. Nevertheless, a highly performing memory cell is o btained that operates with moderate voltages only. Furthermore, the source- side injection (SSI) mechanism used for cell programming exhibits a very na rrow threshold voltage (Vt) distribution, which is maintained even after 1 million program/erase cycles. Because of this tight distribution and the in herent overerase immunity, no additional verify circuitry is needed, which greatly simplifies the decoder design and minimizes the memory footprint. F inally, the memory cell is placed in a quasi-virtual ground array (QVGA) co nfiguration, resulting in a compact memory area with only three quarters of a contact per cell, whereas most arrays require at least a full contact pe r cell or more.