Distributed memory parallel architecture based on modular linear arrays for 2-D separable transforms computation

Citation
J. Fridman et Es. Manolakos, Distributed memory parallel architecture based on modular linear arrays for 2-D separable transforms computation, J VLSI S P, 28(3), 2001, pp. 187-203
Citations number
36
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
ISSN journal
13875485 → ACNP
Volume
28
Issue
3
Year of publication
2001
Pages
187 - 203
Database
ISI
SICI code
1387-5485(2001)28:3<187:DMPABO>2.0.ZU;2-9
Abstract
A framework for mapping systematically 2-dimensional (2-D) separable transf orms into a parallel architecture consisting of fully pipelined linear arra y stages is presented. The resulting model architecture is characterized by its generality, high degree of modularity, high throughput, and the exclus ive use of distributed memory and control. There is no central shared memor y block to facilitate the transposition of intermediate results, as it is c ommonly the case in row-column image processing architectures. Avoiding sha red central memory has positive implications for speed, area, power dissipa tion and scalability of the architecture. The architecture presented here m ay be used to realize any separable 2-D transform by only changing the coef ficients stored in the processing elements. Pipelined linear arrays for com puting the 2-D Discrete Fourier Transform and 2-D separable convolution are presented as examples and their performance is evaluated.