Forced convection board level thermal design methodology for electronic systems

Citation
R. Cole et al., Forced convection board level thermal design methodology for electronic systems, J ELEC PACK, 123(2), 2001, pp. 120-126
Citations number
23
Categorie Soggetti
Mechanical Engineering
Journal title
JOURNAL OF ELECTRONIC PACKAGING
ISSN journal
10437398 → ACNP
Volume
123
Issue
2
Year of publication
2001
Pages
120 - 126
Database
ISI
SICI code
1043-7398(200106)123:2<120:FCBLTD>2.0.ZU;2-Y
Abstract
The case is made for the continued use of single valued thermal resistances for the prediction of component junction temperature, and, hence, reliabil ity. These values are adjusted using empirically determined influence facto rs to account for thermal and aerodynamic interactions at board level. The paper presents measured values of influence factors for arrays of Plastic Q uad Flat Packs (PQFPs) over a range of Reynolds numbers and with a series o f board level obstacles modeling upstream passive components. The results a re formulated into a novel set of design rules.