Investigating memory system energy behavior using software and hardware optimizations

Memory system usually consumes a significant amount of energy in many batte ry-operated devices. In this paper, we provide a quantitative comparison an d evaluation of the interaction of two hardware cache optimization mechanis ms and three widely used compiler optimization techniques used to reduce th e memory system energy. Our presentation is in two parts. First, we focus o n a set of memory-intensive benchmark codes and investigate their memory sy stem energy behavior due to data accesses under hardware and compiler optim izations. Then, using four motion estimation codes, we look at the influenc e of compiler optimizations on the memory system energy considering the ove rall impact of instruction and data accesses.