A fast and accurate method of power estimation for logic level networks

A method for estimating the power consumption of multilevel combinational n etworks is introduced. The proposed method has as inputs the signal probabi lities, the data correlations of the primary inputs and the structure of th e circuit, and consists of two major steps: (i) the calculation of the swit ching activity on an individual gate and (ii) the calculation of the switch ing activity of any node of the network. The foregoing step includes the de rivation of novel formulas for calculating the switching activity of basic gates. The latter step includes the development of an algorithm, which prop agates the signal probabilities through the network and calculates the swit ching activity of any logic node. The proposed method provides accurate swi tching activity values performing their calculation in reduced time interva l. The experimental results prove that the proposed method achieves signifi cant reduction up to 50% in terms of multiplications compared to method of [6].