Enhancement-mode power heterojunction FET utilizing Al0.5Ga0.5As barrier layer with negligible operation gate current for digital cellular phones

Citation
Y. Bito et al., Enhancement-mode power heterojunction FET utilizing Al0.5Ga0.5As barrier layer with negligible operation gate current for digital cellular phones, IEEE DEVICE, 48(8), 2001, pp. 1503-1509
Citations number
11
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN journal
00189383 → ACNP
Volume
48
Issue
8
Year of publication
2001
Pages
1503 - 1509
Database
ISI
SICI code
0018-9383(200108)48:8<1503:EPHFUA>2.0.ZU;2-O
Abstract
We have developed a novel enhancement-mode double-doped AlGaAs/InGaAs/AlGaA s heterojunction FET (HJFET) with a 5 nm thick Al0.5Ga0.5As barrier layer i nserted between an In0.2Ga0.8As channel layer and an upper Al0.2Ga0.8As ele ctron supply layer. The Al0.5Ga0.5As barrier layer reduces gate current und er high forward gate bias voltage, resulting in a high forward gate turn-on voltage (V-F) of 0.87 V, which is 170 mV higher than that of an HJFET with out the barrier layer. Suppression of gate current assisted by a parallel c onduction path in the upper electron supply layer was found to be also impo rtant for achieving the high V-F. The developed device exhibited a high max imum drain current of 300 mA/mm with a threshold voltage of 0.17 V, A 950 M Hz PDC power performance was evaluated under single 3.5 V operation. An HJF ET with a 0.5 mum long gate exhibited 0.92 W output power and 63.6% power-a dded efficiency with 0.08 mA gate current (I-g) at -48 dBc adjacent channel leakage power at 50 kHz off-center frequency. This I-g is one-thirteenth t o that of the HJFET without the barrier layer. These results indicate that the developed enhancement-mode HJFET is suitable for single low voltage ope ration power applications.