Low power design for ASIC cores

Authors
Dean, A Garrett, D Stan, MR Ventrone, S
Citation
A. Dean et al., Low power design for ASIC cores, VLSI DESIGN, 12(3), 2001, pp. 317-331
Citations number
4
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
VLSI DESIGN
ISSN journal
1065514X → ACNP
Volume
12
Issue
3
Year of publication
2001
Pages
317 - 331
Database
ISI
SICI code
1065-514X(2001)12:3<317:LPDFAC>2.0.ZU;2-F
Abstract
A semicustom ASIC design methodology is used to develop a low power DSP cor e for mobile (battery powered) applications. Different low power design tec hniques are used, including dual voltage, low power library elements, accur ate power reporting, pseudomicrocode, transition-once logic, clock gating, and others.