Design of low-voltage CMOS continuous-time filter with on-chip automatic tuning

A technique for designing a low-voltage continuous-time active filter is pr esented in this paper. In this technique, current sources are added to the inverting or noninverting op-amp terminals such that the op-amp input commo n-mode voltages can be set close to one of the supply rails to allow low-vo ltage operation. An automatic frequency and Q tuning technique is proposed for tuning the active filter using programmable capacitor arrays (PCAs). Th e proposed tuning technique does not require any peak detectors, which are difficult to implement at a low supply voltage. Instead, it uses a few anal og comparators, a digital comparator, and a few binary counters to adjust t he PCAs. To demonstrate the proposed techniques, a 1-V 1-MHz second-order f ilter fabricated in a conventional 1.2-mum CMOS process is presented. For a 5-kHz input signal, the filter achieves a THD of -60.2 dB for a peak-to-pe ak output voltage of 600 mV. The frequency tuning range is between 585 kHz and 1.325 MHz. The measured power consumption for the filter alone consumes about 0.52 mW and for the entire system consumes about 1.6 mW for a supply voltage of +/-0.5 V.