100-Mbit/s single-chip Q-VLMS MLSE equalizer LSI for TDMA mobile radio communications

A single-chip 100-Mbit/s burst-operation two-tap maximum likelihood sequenc e estimation (MLSE) equalizer LSI for QPSK signals is introduced. It also s upports two-branch diversity combining. Three new techniques are used to re alize this fast equalizer LSI: the quantized variable-gain least mean squar es (VLMS) algorithm, which has small processing delay with fast convergence characteristics; a simple complex-valued multiplication scheme based on in verting the sign and switching the in-phase and quadrature-phase components ; and a parallel structure to minimize the processing delay of path memory. The chip, containing 75 kgates, is manufactured using the 0.45-mum-CMOS ga te array process. The supply voltage is 3.3 V. This LSI offers higher proce ssing speed than any other conventional equalizer chip for mobile radio com munications.