Adaptive analog IF signal processor for a wide-band CMOS wireless receiver

Citation
F. Behbahani et al., Adaptive analog IF signal processor for a wide-band CMOS wireless receiver, IEEE J SOLI, 36(8), 2001, pp. 1205-1217
Citations number
20
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
ISSN journal
00189200 → ACNP
Volume
36
Issue
8
Year of publication
2001
Pages
1205 - 1217
Database
ISI
SICI code
0018-9200(200108)36:8<1205:AAISPF>2.0.ZU;2-E
Abstract
An IF strip for a wireless receiver supports a variable baud rate by changi ng analog filter bandwidth. Sliding and step adaptive dynamic range are bot h used at EF to dissipate only the necessary power at prevailing channel co nditions. A combination of VGA and PGA is developed for 64-QAM. The total s ignal processor draws an average of 16 mA from 3.3 V and a peak of 73 mA. T he differential input noise is as low as 3.9nV/root Hz, while maximum IIIP3 is +22 dBm with respect to 100 ohms.