Investigation of polycrystalline silicon grain structure with single waferchemical vapor deposition technique

It is known that the grain structure in the polysilicon gate electrode can directly affect dopant activation and gate electrode depletion (GED). It is highly desirable to control the grain size and orientation during polysili con processing for improved integrated circuit device yield and reliability . This article demonstrates the capability of growing polysilicon films wit h specific grain structures using a single wafer chemical vapor deposition (CVD) reactor with nitrogen carrier gas. The deposition temperature is vari ed from 650 to 690 degreesC. The effect of hydrogen addition during deposit ion is examined. Films deposited at various process conditions are characte rized by transmission electron microscopy and x-ray diffraction techniques. The results show that the polysilicon grain size and orientation are sensi tive to the hydrogen concentration. With a carefully selected deposition te mperature and hydrogen concentration combination, the single wafer CVD tech nique is able to engineer the polysilicon grain size and orientations. A de sired polysilicon grain structure can be tailored for specific device needs . The effect of the polysilicon grain structure on electrical parameters su ch as effective oxide thickness and GED will be discussed. (C) 2001 America n Vacuum Society.