Threshold voltage instabilities of all-organic thin-film transistors are in
vestigated as a function of stress time and stress bias. The dominant effec
t is a positive threshold shift for negative gate bias stress which is expl
ained by mobile ions drifting in the insulator when a gate field is applied
. Trapping of charge carriers at the semiconductor-insulator interface play
s only a minor role. Furthermore, we investigate the stress behavior of a b
asic logic element, an inverter. In comparison to a single transistor, we o
bserve improved stability which arises from partial compensation of the par
ametric shifts during operation. (C) 2001 American Institute of Physics.