Si single-electron transistors with high voltage gain

Si single-electron transistors with a high voltage gain at a considerably h igh temperature have been fabricated by vertical pattern-dependent oxidatio n. The method enables the automatic formation of very small tunnel junction s having capacitances of less than 1 aF. In addition, the use of a thin (a few ten nanometers thick) gate oxide allows a strong coupling of the island to the gate, which results in a gate capacitance larger than the junction capacitances. It is demonstrated at 27 K that an inverting voltage gain, wh ich is governed by the ratio of the gate capacitance to the drain tunnel ca pacitance, exceeds 3 under constant drain current conditions.