A transceiver circuit for ATM networks

This paper presents a transceiver digital circuit. The circuit is responsib le for the emission of packets to the asynchronous transfer mode (ATM) netw ork as well as for the manipulation of received ATM packets belonging to vi rtual connections. It has been designed to support data communication servi ces. The circuit, which can be used in terminals or in interworking units a nd switches, implements basic functions of the lower layers of the ATM prot ocol reference model. The transmission functionality includes cell bufferin g, header error control, cell assembling, rate coupling and information ins ertion. The receiver realizes information extraction, rate decoupling, cell buffering, header error detection and correction, connection identity fiel ds extraction and identification, cell disassembling and classification, an d idle cell discarding functions. The circuit has been implemented on appli cations specific integrated circuit (ASIC) chips.