PERFORMANCE-DRIVEN ROUTING WITH MULTIPLE SOURCES

Existing routing problems for delay minimization consider the connecti on of a single source node to a number of sink nodes, with the objecti ve of minimizing the delay from the source to all sinks, or a set of c ritical sinks, In this paper, we study tile problem of routing nets wi th multiple sources, such as those found in signal husses. This new mo del assumes that each node in a net may be a source, a sink, or both, The objective is to optimize the routing topology to minimize the tota l weighted delay between ail node pairs (or a subset of critical node pairs). We present a heuristic algorithm for the multiple-source perfo rmance-driven routing tree problem based on efficient construction of minimum-diameter minimum-cost Steiner trees. Experimental results on r andom nets with submicrometer CMOS IC and MCM technologies show an ave rage of 12.6% and 21% reduction in the maximum interconnect delay, whe n compared with conventional minimum Steiner tree based topologies. Ex perimental results on multisource nets extracted from an Intel process or show as much as a 16.1% reduction in the maximum interconnect delay , when compared with conventional minimum Steiner tree based topologie s.