System-level test synthesis for mixed-signal designs

Hierarchical test approaches are a must for large designs due to the comput ational complexity and tight time-to-market requirements. In hierarchical t est synthesis, test design is conducted at a subsystem level where the desi gn complexity is manageable. For analog systems, tests are generally design ed at the basic block level. This paper outlines a tool for translating bas ic block-level tests into system-level tests for large analog systems. Comp utational effectiveness is achieved by the use of high level models and by a pre-analysis of the system to identify feasible translation paths. A meth od to compute the fault and yield coverages of the resultant system-level t ests is also provided in order to evaluate the translation. Experimental re sults show that test translation reduces design for testability overhead si gnificantly while satisfying coverage requirements.