An insulator-lined silicon substrate-via technology with high aspect ratio

We have developed a novel high-aspect ratio substrate- Aa technology in sil icon that features a SiN insulator liner. In this technology, the via is co mpletely filled with electroplated Cu. We have demonstrated vias with an as pect ratio of 30 and we have verified the integrity of the liner in vias wi th an aspect ratio of 8. The impedance of individual vias was measured in t he microwave regime using a high-frequency test structure. The measured ind uctance of vias with aspect ratios between 3 and 30 approach the theoretica lly expected values.