Grain boundary crack growth in interconnects with an electric current

Failure of thin-film interconnects poses a great concern in semiconductor d evices. Due to the high electric current density in interconnects, electrom igration-induced atomic flux is recognized as an important failure mechanis m. For wide polycrystalline interconnects, atomic flux along grain boundari es is believed to be the major failure mechanism. In situ transmission elec tron microscopy observations revealed void propagation along grain boundari es. Thus, we consider steady state crack growth along a grain boundary in a n interconnect subjected to a high current density. Crack growth occurs via mass transport driven by surface curvature and electric field. For crack p ropagation transverse to the remote electric field, the direction of electr ic field on one crack surface is opposite to that on the other crack surfac e. The governing equation is derived and a numerical solution presented. Th e results indicated that crack growth rate and width are proportional to /E -0/(3/2) and /E-0/(-1/2), respectively, where E-0 is the applied electric f ield. The crack tip morphology map can be divided into four regions for all materials with a known ratio of boundary to surface free energies: Case I is defined as that both crack tip angles are positive, Case II, one of crac k angles is 0 degrees, and Case III, one crack tip angle is positive and th e other is negative, Case IV corresponds to that crack growth is physically impossible to occur. (C) 2001 Elsevier Science B.V. All rights reserved.