Theory of latency-insensitive design

Citation
Lp. Carloni et al., Theory of latency-insensitive design, IEEE COMP A, 20(9), 2001, pp. 1059-1076
Citations number
44
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
ISSN journal
02780070 → ACNP
Volume
20
Issue
9
Year of publication
2001
Pages
1059 - 1076
Database
ISI
SICI code
0278-0070(200109)20:9<1059:TOLD>2.0.ZU;2-E
Abstract
The theory of latency-insensitive design is presented as the foundation of a new correct-by-construction methodology to design complex systems by asse mbling intellectual property components. Latency-insensitive designs are sy nchronous distributed systems and are realized by composing functional modu les that exchange data on communication channels according to an appropriat e protocol. The protocol works on the assumption that the modules are stall able, a weak condition to ask them to obey. The goal of the protocol is to guarantee that latency-insensitive designs composed of functionally correct modules behave correctly independently of the channel latencies. This allo ws us to increase the robustness of a design implementation because any del ay variations of a channel can be "recovered" by changing the channel laten cy while the overall system functionality remains unaffected. As a conseque nce, an important application of the proposed theory is represented by the latency-insensitive methodology to design large digital integrated circuits by using deep submicrometer technologies.