Performance analysis of k-ary n-cube networks with pipelined circuit switching

Several existing studies have revealed that pipelined circuit switching (or PCS for short) can provide superior performance characteristics over wormh ole switching. This paper proposes a new analytical model for PCS in high-r adix high-dimensional k-ary n-cubes augmented with virtual channel support. The model uses Random Walk Theory to analyse the backtracking actions of t he message header during the path set-up phase, and M/G/1 queueing systems to compute the mean waiting time that a message experiences at a source nod e before entering the network. Results from simulation experiments confirm that the proposed model exhibits a good degree of accuracy for various netw ork sizes and under different operating conditions.