Low voltage operation of nonvolatile metal-ferroelectric-metal-insulator-semiconductor (MFMIS)-field-effect-transistors (FETs) using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si structures

We report p-channel it metal-ferroelectric-metal-insulator-semiconductor (M FMIS)-field-effect-transistors (FETs) which can operate at a voltage as low as 3.5 V using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si structures. It is shown th at the use of the saturated P-E hysteresis loop is effective to improve the data retention time. To utilize the saturated P-E loop, MFMIS-FETs with a large S-M/S-F ratio are fabricated. We demonstrate the nonvolatile memory f unction of the p-channel MFMIS-FETs with a memory window of 1.5 V, operatin g at +/-3.5 V. It was also found that the fabricated MFMIS-FETs have fairly good data retention characteristics.