Current status of research and development for three-dimensional chip stack technology

The national project of "Ultra High-Density Electronic System Integgration" was initiated in 1999. This is the first project to focus on a niche area between electronic devices and systems. It aims to develop technologies for overcoming the problems in terms of performance of electronic systems. Thr ee-dimensional (3D) LSI chip stacking, optoelectronics hybrid integration, and optimum circuit design are the technology categories. For the 3D stacki ng technology, a chip-based stacking technology is under extensive developm ent that includes wafer preparation for chip stacking, wafer thinning, chip stacking, and inspection and testing. In this paper, the current developme nt status of the 3D stacking technology, called V-STACK technology, is intr oduced.