This paper presents a systematic development of a unified signal flow graph
model for an interleaved DC-DC parallel converter system operating in cont
inuous current mode. This signal flow graph approach provides a means to tr
anslate directly the switching converter to its graphic model, from which t
he steady-state and dynamic behaviour of the converter can be studied easil
y. The development of a unified signal flow graph is explained for a three-
cell interleaved parallel converter system. Derivation of large-signal, sma
ll-signal and steady-state models from a unified signal flow graph is demon
strated by considering a two-cell interleaved converter system operating in
complementary activation mode. Converter performance expressions such as s
teady-state voltage gain, efficiency expressions and small-signal character
istic transfer functions are also derived. A large-signal model was program
med in a TUTSIM simulator, and the large-signal responses against supply an
d load disturbances were predicted. Signal flow graph analysis results are
validated with PSIM simulations. Experimental observations are provided to
validate the signal flow graph modelling method. Further, the mathematical
models obtained from the signal flow graph modelling are in agreement with
those obtained from the state-space averaging technique.