Parametric compact models for the 72-pins polymer stud grid array (TM)

Authors
Driessens, E Van Dooren, S Vandevelde, B Degryse, D Beyne, E Heerman, M Van Puymbroeck, J
Citation
E. Driessens et al., Parametric compact models for the 72-pins polymer stud grid array (TM), MICROELEC J, 32(10-11), 2001, pp. 839-846
Citations number
6
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS JOURNAL
ISSN journal
00262692 → ACNP
Volume
32
Issue
10-11
Year of publication
2001
Pages
839 - 846
Database
ISI
SICI code
0026-2692(200110/11)32:10-11<839:PCMFT7>2.0.ZU;2-A
Abstract
A compact model or thermal resistor network of a 72-pins polymer stud grid array (PSGA) assembly is presented. A general thermal network is simplified to a compact model with seven resistors. Secondly, the effect of the chip dimensions on the different thermal resistors is investigated. Thirdly, the compact models are synthesized in a response surface model (RSM). Any cust omer can then calculate the compact model for his specific application by f illing in the geometry properties of the package in the RSM-equations and c alculating the maximal temperature in the assembly. (C) 2001 Elsevier Scien ce Ltd. All rights reserved.