B. Kleveland et al., Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design, IEEE J SOLI, 36(10), 2001, pp. 1480-1488
The increasing number of interconnect layers that are needed in a CMOS proc
ess to meet the routing and power requirements of large digital circuits al
so yield significant advantages for analog applications. The reverse thickn
ess scaling of the top metal layer can be exploited in the design of low-lo
ss transmission lines. Coplanar transmission lines in the top metal layers
take advantage of a low metal resistance and a large separation from the he
avily doped silicon substrate. They are therefore fully compatible with cur
rent and future CMOS process technologies. To investigate the feasibility o
f extending CMOS designs beyond 10 GHz, a wide range of coplanar transmissi
on lines are characterized. The effect of the substrate resistivity on copl
anar wave propagation is explained. After achieving a record loss of 0.3 dB
/mm at 50 GHz, coplanar lines are used in the design of distributed amplifi
ers and oscillators. They are the first to achieve higher than 10-GHz opera
ting frequencies in a conventional CMOS technology.