A CMOS 400-Mb/s serial link for AS-memory systems using a PWM scheme

In this paper, a serial link for AS-memory systems fabricated in a 0.25-mum standard CMOS technology is presented. This serial link utilizes a pulsewi dth modulation (PWM) technique. By transmitting the PWM-encoded signal with periodic rising edges, the clock can be implicitly embedded in the data st ream and the associating overhead needed in clock/data recovery circuits ca n be mitigated. The symbol rate is 200 Mb/s and the equivalent data rate is 400 Mb/s. The PWM transceiver dissipates 66.5 mW at a 2.5-V supply voltage . It is suitable for the AS-memory systems in which the pin count is limite d and elaborate clock/data recovery circuits are not required.